The present invention relates to a method and apparatus for reducing power and complexity in a digital subscriber line (DSL) driver with a multi stage delta-sigma modulator with a high current 1-bit digital-to-analog converter (DAC) output stage.
With the advent of the internet and other high-bandwidth electronic communication systems and the consumer demand for information, interactive gaming and electronic entertainment such as video on-demand, there has been a substantial need for reliable and affordable high bandwidth mediums for facilitating data transmissions between service providers and their customers. Attempts to ensure that such mediums be affordable to consumers, and structurally attainable in a cost-effective manner for providing service to customers, involve using already existing copper wire telephone systems (plain old telephone system or POTS) infrastructure.
There are many ways to bring home a high-speed link beyond the 56-kbps limit that POTS-based V.90 performance allows. The methods include integrated-services digital network (ISDN), satellite links, cable modems, hybrid fiber-coax, and wireless local loops. All these methods eventually encounter the virtually universal, metallic local loop that is the xe2x80x9clast milexe2x80x9d between the phone company""s central office (CO) and the end user in the public switched-telephone network (PSTN). This loop can be a significant barrier to installing yet another type of path.
Digital subscriber line (xDSL) holds a lot of promise. It uses advanced signal-processing concepts that force mathematician Claude Shannon""s 1948 theory of channel-information capacity to its ultimate level, pushing data onto the local loop at several-megabit-per-second rates. But making xDSL a reality takes more than sophisticated algorithms running on digital signal processors (DSPs). An analog-front-end (AFE) circuitry that sits between the telephone company loop and the DSP plays a key role in successful and practical implementation of any xDSL variation. This AFE must digitize or re-create analog signals with excellent dynamic-range performance, drive fast-slewing signals into lossy copper lines, and capture the weak incoming analog signals that far stronger outbound signals overshadowxe2x80x94all the while using little power at each end of the link. A number of DSL standards and protocols have been proposed such as VDSL, SHDSL, RADSL and ADSL.
In existing systems, the CO receives digital information from a data source and sends information to an AFE that converts the data from a digital form into a continuous time analog signal that can be transmitted on the analog lines. The analog signal is delivered, via a DSL line driver, which is separate from the AFE, in accordance with the amount of power required to drive the amplified analog signal through the two-wire pair to the end-user. There is always a need to minimize the power required to transmit and receive data at a higher speed and because the existing DSL line drivers use a high-current, linear Class AB or Class G amplifier arrangements with a continuous time (analog) waveform, arrangements where the DSL line driver input is produced by filtering the input of a digital-to-analog converter. Such linear Class AB line drivers account for 50%-75% of the per-port power consumption and in the Class G line driver scenario, an incremental improvement in the power consumed is achieved at the cost of additional power supply rails. These and other drawbacks exist.
In light of the foregoing, the invention is a method and apparatus for a high-drive current digital-to-analog converter that accommodates all DSL applications in a power efficient manner, by adding a high-current drive capability to the 1-bit digital-to-analog converter based on a delta-sigma modulator.
In general, one embodiment of the invention provides a digital sequence x(n), clocked at an input sampling rate, and applied to an interpolator, where it is sampled at a higher rate. The sequence may then be applied into a multi-stage delta-sigma (xcex94xcexa3) modulator where the sequence is once again sampled at a higher sampling rate of the input sampling rate. The multi-stage delta-sigma modulator produces a bi-level output of the sequence which includes output noise that has been spectrally shaped to insure that the noise power is small in the band of frequencies occupied by the desired signal.
The invention has numerous advantageous features, a few examples of which are delineated hereafter. Embodiments of the invention, which are described herein, may possess one or more, but not necessarily all, of the features set out hereafter. One feature of the invention is that it provides a low cost solution to providing a line driver, which will function on all DSL applications.
Another feature is that, while it provides a simpler line DSL driver with less components for use in all DSL applications, it reduces the amount of power needed for a conventional DSL line driver.
Other objects, features, and advantages of the present invention will become apparent to one of ordinary skill in the art upon examination of the following drawings and detailed description. It is intended that all such additional objects, features, and advantages be included herein within the scope of the present invention, as defined by the claims.